A device under test (DUT) such as a set of semiconductor integrated circuits formed on a semiconductor wafer is generally electrically tested by a semiconductor testing system including a probe apparatus (prober) and the like. Such a semiconductor testing system can determine whether or not the DUT is good by supplying electric signals from a tester via a probe assembly to the DUT. The probe assembly includes a probe base plate (probe card) having probes arranged differently per DUT, and the probes contact respective terminals of the DUT. The respective terminals of the DUT are arranged on a plane, and the respective probes desirably contact the respective terminals with uniform loads (refer to Patent Literature 1).
In the test of the DUT, a stage holding the DUT presses the DUT to the probes of the probe assembly so that the respective terminals of the DUT may contact the respective probes reliably. A load to each terminal of the DUT is a predetermined value. For example, in a case where the number of probes is 50000, the DUT needs to be pressed up with a force 50000 times the load applied to each probe. The probe assembly includes a highly rigid reinforcing plate, but when the probe assembly receives enormous loads, the probe assembly may warp, and variations in load and distance to the terminal may occur among the probes in the equal plane. Such variations cause test accuracy to be degraded. As a countermeasure against this problem, a method for fixing a clamp head formed at a center portion on a rear surface of a probe card is disclosed to prevent a center of the probe card from being raised (refer to Patent Literature 2).